Morphological Image Processing: Architecture and VLSI design / Nejlevnější knihy
Morphological Image Processing: Architecture and VLSI design

Kód: 01968322

Morphological Image Processing: Architecture and VLSI design

Autor P. P. Jonker

This book describes image processing research based on the morphology of the objects in an image and a VLSI design of a Cellular Logic Processing Element for a real-time processor pipeline. The field of image processing has spawne ... celý popis

3532


Skladem u dodavatele
Odesíláme za 5-8 dnů
Přidat mezi přání

Mohlo by se vám také líbit

Dárkový poukaz: Radost zaručena

Objednat dárkový poukazVíce informací

Více informací o knize Morphological Image Processing: Architecture and VLSI design

Nákupem získáte 353 bodů

Anotace knihy

This book describes image processing research based on the morphology of the objects in an image and a VLSI design of a Cellular Logic Processing Element for a real-time processor pipeline. The field of image processing has spawned a number of special parallel computer architectures: the Square (SIMD), Processor Array, the Pyramid, the Linear Processor Array (or scan line array) and the Processor Pipeline. This book features a classification of low-level image processing operations, reviews some intermediate level algorithms, and gives a short introduction into computer architecture used for image and digital signal processing. Morphology-based processing images is introduced by treating cellular logic operations such as skeletonization as hit-or-miss transformations. This approach can be extended to images of higher dimensions than two and a method is described to construct hit-or-miss masks for the skeletonization of these images. In the second part of the book a study is performed on the speed bottlenecks that can be found in the main architectural groups followed by the description of a method for the structured design of integrated, digital hardware. The VLSI design of a CMOS Processing Element for the real-time processing of binary images and the board level design of a scalable processor pipeline for a real-time low-level processing of grey value images is described in detail. Finally, a computer architecture for low and intermediate processing of two and three dimensional images if proposed.

Parametry knihy

Zařazení knihy Knihy v angličtině Technology, engineering, agriculture Other technologies & applied sciences Applied optics

3532

Oblíbené z jiného soudku



Osobní odběr Praha, Brno a 47531 dalších

Copyright ©2008-26 nejlevnejsi-knihy.cz Všechna práva vyhrazenaSoukromíCookies


Můj účet: Přihlásit se
Všechny knihy světa na jednom místě. Navíc za skvělé ceny.

Nákupní košík ( prázdný )

Vyzvednutí v Balikovně a PPL
boxech
zdarma nad 1 499 Kč.

Nacházíte se: