Kód: 01414475
The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissi ... celý popis
Angličtina
Nákupem získáte 353 bodů
Anotace knihy
The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate the assumptions that form the basis of previous design methodologies and tools. This book is intended to sample the most important, contemporary, and advanced layout optimization problems emerging with the advent of very deep submicron technologies in semiconductor processing. Audience: A reference work for graduate students, senior undergraduates, and researchers.
Parametry knihy
Zařazení knihy Knihy v angličtině Computing & information technology Computer science
3532 Kč
Angličtina
Osobní odběr Praha, Brno a 47512 dalších
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