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Více informací o knize Digital Logic Design Using Verilog

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• Anotace
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Anotace knihy

This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe the RTL design scenarios, from the simple to complex. It constructs the logic design story from the basic fundamentals of logic design to advance RTL design concepts. Keeping in view today's age of miniaturization, the book gives more practical information on the issues in ASIC RTL design and how to overcome these. It clearly explains how to write an efficient RTL code and how to improve the design performance. The book also describes advanced RTL design concepts such as low power designs, multiple clock domain designs and SOC based design. The practical orientation of the book makes it ideal for training programs for practicing design engineers and for short-term vocational programs.

Parametry knihy

Zařazení knihy Knihy v angličtině Technology, engineering, agriculture Electronics & communications engineering Electronics engineering

• Plný název: Digital Logic Design Using Verilog
• Podnázev: Coding and RTL Synthesis
• Autor: Vaibbhav Taraate
• Jazyk: Angličtina
• Vazba: Pevná
• Počet stran: 416
• EAN: 9788132227892
• ISBN: 8132227891
• ID: 02944238
• Nakladatelství: Springer, India, Private Ltd
• Hmotnost: 8602 g
• Rozměry: 235 × 155 × 25 mm
• Datum vydání: 20. May 2016

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