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Více informací o knize CMOS PLL Synthesizers: Analysis and Design

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Anotace knihy

This book presents both fundamentals and the state of the art of PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, Sigma Delta fractional-N synthesizer prototype is implemented in 0.35m m CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which tackle speed and integration bottlenecks of PLL synthesizer elegantly.§This book is conceived as a PLL synthesizer manual for both academia researchers and industry design engineers.CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state of the art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which elegantly tackle speed and integration bottlenecks of PLL synthesizer.§This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers.

Parametry knihy

Zařazení knihy Knihy v angličtině Technology, engineering, agriculture Energy technology & engineering Electrical engineering

• Plný název: CMOS PLL Synthesizers: Analysis and Design
• Autor: Keliu Shu, Edgar Sánchez-Sinencio
• Jazyk: Angličtina
• Vazba: Brožovaná
• Počet stran: 216
• EAN: 9781441936509
• ISBN: 1441936505
• ID: 01422228
• Nakladatelství: Springer-Verlag New York Inc.
• Hmotnost: 361 g
• Rozměry: 235 × 155 × 13 mm
• Datum vydání: 28. October 2010

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